AESENC

Perform One Round of an AES Encryption Flow

Opcodes

Hex Mnemonic Encoding Long Mode Legacy Mode Description
66 0F 38 DC /r AESENC xmm1, xmm2/m128 A Valid Valid Perform one round of an AES encryption flow, operating on a 128-bit data (state) from xmm1 with a 128-bit round key from xmm2/m128.

Instruction Operand Encoding

Op/En Operand 0 Operand 1 Operand 2 Operand 3
A NA NA ModRM:r/m (r) ModRM:reg (r, w)

Description

This instruction performs a single round of an AES encryption flow using a round key from the second source operand, operating on 128-bit data (state) from the first source operand, and store the result in the destination operand.

Use the AESENC instruction for all but the last encryption rounds. For the last encryption round, use the AESENCCLAST instruction.

The first source operand and the destination operand are the same and must be an XMM register. The second source operand can be an XMM register or a 128-bit memory location.

Pseudo Code

AESENC
STATE = SRC1;
RoundKey = SRC2;
STATE = ShiftRows(STATE);
STATE = SubBytes(STATE);
STATE = MixColumns(STATE);
DEST[127:0] = STATE XOR RoundKey;
DEST[255:128] (Unmodified)

Exceptions

SIMD Floating-Point Exceptions

None

64-Bit Mode Exceptions

Exception Description
#UD If CR0.EM[bit 2] = 1. If CR4.OSFXSR[bit 9] = 0. If CPUID.01H:ECX.AESNI[bit 25] = 0. If the LOCK prefix is used.
#NM If CR0.TS[bit 3] = 1.
#PF(fault-code) For a page fault.
#GP(0) If the memory address is in a non-canonical form. If memory operand is not aligned on a 16-byte boundary, regardless of segment.
#SS(0) If a memory address referencing the SS segment is in a non-canonical form.

Compatibility Mode Exceptions

Same exceptions as in protected mode.

Virtual-8086 Mode Exceptions

Exception Description
#PF(fault-code) For a page fault.
Same exceptions as in real address mode.

Real-Address Mode Exceptions

Exception Description
#UD If CR0.EM[bit 2] = 1. If CR4.OSFXSR[bit 9] = 0. If CPUID.01H:ECX.AESNI[bit 25] = 0. If the LOCK prefix is used.
#NM If CR0.TS[bit 3] = 1.
#GP If a memory operand is not aligned on a 16-byte boundary, regardless of segment. If any part of the operand lies outside the effective address space from 0 to FFFFH.

Protected Mode Exceptions

Exception Description
#UD If CR0.EM[bit 2] = 1. If CR4.OSFXSR[bit 9] = 0. If CPUID.01H:ECX.AESNI[bit 25] = 0. If the LOCK prefix is used.
#NM If CR0.TS[bit 3] = 1.
#PF(fault-code) For a page fault.
#SS(0) For an illegal address in the SS segment.
#GP(0) For an illegal memory operand effective address in the CS, DS, ES, FS or GS segments. If a memory operand is not aligned on a 16-byte boundary, regardless of segment.