DIV

Unsigned Divide

Opcodes

Hex Mnemonic Encoding Long Mode Legacy Mode Description
REX.W + F7 /6 DIV r/m64 A Valid N.E. Unsigned divide RDX:RAX by r/m64, with result stored in RAX  Quotient, RDX  Remainder.
F7 /6 DIV r/m32 A Valid Valid Unsigned divide EDX:EAX by r/m32, with result stored in EAX  Quotient, EDX  Remainder.
F7 /6 DIV r/m16 A Valid Valid Unsigned divide DX:AX by r/m16, with result stored in AX  Quotient, DX  Remainder.
REX + F6 /6 DIV r/m8 * A Valid N.E. Unsigned divide AX by r/m8, with result stored in AL  Quotient, AH  Remainder.
F6 /6 DIV r/m8 A Valid Valid Unsigned divide AX by r/m8, with result stored in AL  Quotient, AH  Remainder.

Instruction Operand Encoding

Op/En Operand 0 Operand 1 Operand 2 Operand 3
A NA NA NA ModRM:r/m (w)

Description

Divides unsigned the value in the AX, DX:AX, EDX:EAX, or RDX:RAX registers (dividend) by the source operand (divisor) and stores the result in the AX (AH:AL), DX:AX, EDX:EAX, or RDX:RAX registers. The source operand can be a general-purpose register or a memory location. The action of this instruction depends on the operand size (dividend/divisor). Division using 64-bit operand is available only in 64-bit mode.

Non-integral results are truncated (chopped) towards 0. The remainder is always less than the divisor in magnitude. Overflow is indicated with the #DE (divide error) exception rather than with the CF flag.

In 64-bit mode, the instruction's default operation size is 32 bits. Use of the REX.R prefix permits access to additional registers (R8-R15). Use of the REX.W prefix promotes operation to 64 bits. In 64-bit mode when REX.W is applied, the instruction divides the unsigned value in RDX:RAX by the source operand and stores the quotient in RAX, the remainder in RDX.

See the summary chart at the beginning of this section for encoding data and limits. See the following table.

DIV Action
Maximum
Operand Size Dividend Divisor Quotient Remainder Quotient
Word/byte AX r/m8 AL AH 255
Doubleword/word DX:AX r/m16 AX DX 65,535
Quadword/doubleword EDX:EAX r/m32 EAX EDX 232 - 1
Doublequadword/quadword RDX:RAX r/m64 RAX RDX 264 - 1

Pseudo Code

IF SRC = 0
	#DE;
FI; (* Divide Error *)
IF OperandSize = 8 (* Word/Byte Operation *)
	temp = AX / SRC;
	IF temp > FFH
		#DE; (* Divide error *)
	ELSE
		AL = temp;
		AH = AX MOD SRC;
	FI;
ELSE
	IF OperandSize = 16 (* Doubleword/word operation *)
		temp = DX:AX / SRC;
		IF temp > FFFFH
			#DE; (* Divide error *)
		ELSE
			AX = temp;
			DX = DX:AX MOD SRC;
		FI;
	FI;
ELSE
	IF Operandsize = 32 (* Quadword/doubleword operation *)
		temp = EDX:EAX / SRC;
		IF temp > FFFFFFFFH
			#DE; (* Divide error *)
		ELSE
			EAX = temp;
			EDX = EDX:EAX MOD SRC;
		FI;
	FI;
ELSE
	IF 64-Bit Mode and Operandsize = 64 (* Doublequadword/quadword operation *)
		temp = RDX:RAX / SRC;
		IF temp > FFFFFFFFFFFFFFFFH
			#DE; (* Divide error *)
		ELSE
			RAX = temp;
			RDX = RDX:RAX MOD SRC;
		FI;
	FI;
FI;

Flags Affected

The CF, OF, SF, ZF, AF, and PF flags are undefined.

Exceptions

64-Bit Mode Exceptions

Exception Description
#UD If the LOCK prefix is used.
#AC(0) If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3.
#PF(fault-code) If a page fault occurs.
#DE If the source operand (divisor) is 0 If the quotient is too large for the designated register.
#GP(0) If the memory address is in a non-canonical form.
#SS(0) If a memory address referencing the SS segment is in a non-canonical form.

Compatibility Mode Exceptions

Same exceptions as in protected mode.

Virtual-8086 Mode Exceptions

Exception Description
#UD If the LOCK prefix is used.
#AC(0) If alignment checking is enabled and an unaligned memory reference is made.
#PF(fault-code) If a page fault occurs.
#SS If a memory operand effective address is outside the SS segment limit.
#GP(0) If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.
#DE If the source operand (divisor) is 0. If the quotient is too large for the designated register.

Real-Address Mode Exceptions

Exception Description
#UD If the LOCK prefix is used.
#SS(0) If a memory operand effective address is outside the SS segment limit.
#GP If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit. If the DS, ES, FS, or GS register contains a NULL segment selector.
#DE If the source operand (divisor) is 0. If the quotient is too large for the designated register.

Protected Mode Exceptions

Exception Description
#UD If the LOCK prefix is used.
#AC(0) If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3.
#PF(fault-code) If a page fault occurs.
#SS(0) If a memory operand effective address is outside the SS segment limit.
#GP(0) If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit. If the DS, ES, FS, or GS register contains a NULL segment selector.
#DE If the source operand (divisor) is 0 If the quotient is too large for the designated register.