FINIT/FNINIT

Initialize Floating-Point Unit

Opcodes

Hex Mnemonic Encoding Long Mode Legacy Mode Description
DB E3 FNINIT* None Valid Valid Initialize FPU without checking for pending unmasked floating-point exceptions.
9B DB E3 FINIT None Valid Valid Initialize FPU after checking for pending unmasked floating-point exceptions.

Description

Sets the FPU control, status, tag, instruction pointer, and data pointer registers to their default states. The FPU control word is set to 037FH (round to nearest, all exceptions masked, 64-bit precision). The status word is cleared (no exception flags set, TOP is set to 0). The data registers in the register stack are left unchanged, but they are all tagged as empty (11B). Both the instruction and data pointers are cleared.

The FINIT instruction checks for and handles any pending unmasked floating-point exceptions before performing the initialization; the FNINIT instruction does not.

The assembler issues two instructions for the FINIT instruction (an FWAIT instruction followed by an FNINIT instruction), and the processor executes each of these instructions in separately. If an exception is generated for either of these instructions, the save EIP points to the instruction that caused the exception.

This instruction's operation is the same in non-64-bit modes and 64-bit mode.

Pseudo Code

FPUControlWord = 037FH;
FPUStatusWord = 0;
FPUTagWord = FFFFH;
FPUDataPointer = 0;
FPUInstructionPointer = 0;
FPULastInstructionOpcode = 0;

FPU Flags Affected

C0, C1, C2, C3 set to 0.

Exceptions

Floating-Point Exceptions

None.

64-Bit Mode Exceptions

Same exceptions as in protected mode.

Compatibility Mode Exceptions

Same exceptions as in protected mode.

Virtual-8086 Mode Exceptions

Same exceptions as in protected mode.

Real-Address Mode Exceptions

Same exceptions as in protected mode.

Protected Mode Exceptions

Exception Description
#UD If the LOCK prefix is used.
#MF If there is a pending x87 FPU exception.
#NM CR0.EM[bit 2] or CR0.TS[bit 3] = 1.