INVLPG

Invalidate TLB Entry

Opcodes

Hex Mnemonic Encoding Long Mode Legacy Mode Description
0F 01/7 INVLPG m A Valid Valid Invalidate TLB Entry for page that contains m.

Instruction Operand Encoding

Op/En Operand 0 Operand 1 Operand 2 Operand 3
A NA NA NA ModRM:r/m (r)

Description

Invalidates (flushes) the translation lookaside buffer (TLB) entry specified with the source operand. The source operand is a memory address. The processor determines the page that contains that address and flushes the TLB entry for that page.

The INVLPG instruction is a privileged instruction. When the processor is running in protected mode, the CPL of a program or procedure must be 0 to execute this instruction.

The INVLPG instruction normally flushes the TLB entry only for the specified page; however, in some cases, it flushes the entire TLB. See "MOV—Move to/from ControlRegisters" in this chapter for further information on operations that flush the TLB.

This instruction's operation is the same in all non-64-bit modes. It also operates the same in 64-bit mode, except if the memory address is in non-canonical form. In this case, INVLPG is the same as a NOP.

Pseudo Code

Flush(RelevantTLBEntries);
Continue; (* Continue execution *)

Flags Affected

None.

Exceptions

64-Bit Mode Exceptions

Exception Description
#UD Operand is a register. If the LOCK prefix is used.
#GP(0) If the current privilege level is not 0.

Compatibility Mode Exceptions

None.

Virtual-8086 Mode Exceptions

Exception Description
#GP(0) The INVLPG instruction cannot be executed at the virtual-8086 mode.

Real-Address Mode Exceptions

Exception Description
#UD Operand is a register. If the LOCK prefix is used.

Protected Mode Exceptions

Exception Description
#UD Operand is a register. If the LOCK prefix is used.
#GP(0) If the current privilege level is not 0.