MOVBE

Move Data After Swapping Bytes

Opcodes

Hex Mnemonic Encoding Long Mode Legacy Mode Description
REX.W + 0F 38 F1 /r MOVBE m64, r64 B Valid N.E. Reverse byte order in r64 and move to m64.
0F 38 F1 /r MOVBE m32, r32 B Valid Valid Reverse byte order in r32 and move to m32
0F 38 F1 /r MOVBE m16, r16 B Valid Valid Reverse byte order in r16 and move to m16
REX.W + 0F 38 F0 /r MOVBE r64, m64 A Valid N.E. Reverse byte order in m64 and move to r64.
0F 38 F0 /r MOVBE r32, m32 A Valid Valid Reverse byte order in m32 and move to r32
0F 38 F0 /r MOVBE r16, m16 A Valid Valid Reverse byte order in m16 and move to r16

Instruction Operand Encoding

Op/En Operand 0 Operand 1 Operand 2 Operand 3
A NA NA ModRM:r/m (r) ModRM:reg (w)
B NA NA ModRM:reg (r) ModRM:r/m (w)

Description

Performs a byte swap operation on the data copied from the second operand (source operand) and store the result in the first operand (destination operand). The source operand can be a general-purpose register, or memory location; the destination register can be a general-purpose register, or a memory location; however, both operands can not be registers, and only one operand can be a memory location. Both operands must be the same size, which can be a word, a doubleword or quadword.

The MOVBE instruction is provided for swapping the bytes on a read from memory or on a write to memory; thus providing support for converting little-endian values to big-endian format and vice versa.

In 64-bit mode, the instruction's default operation size is 32 bits. Use of the REX.R prefix permits access to additional registers (R8-R15). Use of the REX.W prefix promotes operation to 64 bits. See the summary chart at the beginning of this section for encoding data and limits.

Pseudo Code

TEMP = SRC
IF (OperandSize = 16)
	DEST[7:0] = TEMP[15:8];
	DEST[15:8] = TEMP[7:0];
ELSE
	IF (OperandSize = 32)
		DEST[7:0] = TEMP[31:24];
		DEST[15:8] = TEMP[23:16];
		DEST[23:16] = TEMP[15:8];
		DEST[31:23] = TEMP[7:0];
	ELSE
		IF (OperandSize = 64)
			DEST[7:0] = TEMP[63:56];
			DEST[15:8] = TEMP[55:48];
			DEST[23:16] = TEMP[47:40];
			DEST[31:24] = TEMP[39:32];
			DEST[39:32] = TEMP[31:24];
			DEST[47:40] = TEMP[23:16];
			DEST[55:48] = TEMP[15:8];
			DEST[63:56] = TEMP[7:0];
		FI;
	FI;
FI;

Flags Affected

None.

Exceptions

64-Bit Mode Exceptions

Exception Description
#UD If CPUID.01H:ECX.MOVBE[bit 22] = 0 . If the LOCK prefix is used. If REP (F3H) prefix is used.
#AC(0) If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3.
#PF(fault-code) If a page fault occurs.
#SS(0) If the stack address is in a non-canonical form.
#GP(0) If the memory address is in a non-canonical form.

Compatibility Mode Exceptions

Same exceptions as in protected mode.

Virtual-8086 Mode Exceptions

Exception Description
#UD If CPUID.01H:ECX.MOVBE[bit 22] = 0 . If the LOCK prefix is used. If REP (F3H) prefix is used. If REPNE (F2H) prefix is used and CPUID.01H:ECX.SSE4_2[bit 20] = 0.
#PF(fault-code) If a page fault occurs.
#SS(0) If a memory operand effective address is outside the SS segment limit.
#GP(0) If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.

Real-Address Mode Exceptions

Exception Description
#UD If CPUID.01H:ECX.MOVBE[bit 22] = 0 . If the LOCK prefix is used. If REP (F3H) prefix is used.
#SS If a memory operand effective address is outside the SS segment limit.
#GP If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.

Protected Mode Exceptions

Exception Description
#UD If CPUID.01H:ECX.MOVBE[bit 22] = 0 . If the LOCK prefix is used. If REP (F3H) prefix is used.
#AC(0) If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3.
#PF(fault-code) If a page fault occurs.
#SS(0) If a memory operand effective address is outside the SS segment limit.
#GP(0) If the destination operand is in a non-writable segment. If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit. If the DS, ES, FS, or GS register contains a NULL segment selector.