PACKUSDW

Pack with Unsigned Saturation

Opcodes

Hex Mnemonic Encoding Long Mode Legacy Mode Description
66 0F 38 2B /r PACKUSDWxmm1, xmm2/m128 A Valid Valid Convert 4 packed signed doubleword integers from xmm1 and 4 packed signed doubleword integers from xmm2/m128 into 8 packed unsigned word integers in xmm1 using unsigned saturation.

Instruction Operand Encoding

Op/En Operand 0 Operand 1 Operand 2 Operand 3
A NA NA ModRM:r/m (r) ModRM:reg (r, w)

Description

Converts packed signed doubleword integers into packed unsigned word integers using unsigned saturation to handle overflow conditions. If the signed doubleword value is beyond the range of an unsigned word (that is, greater than FFFFH or less than 0000H), the saturated unsigned word integer value of FFFFH or 0000H, respectively, is stored in the destination.

Pseudo Code

TMP[15:0] = (DEST[31:0] < 0) ? 0 : DEST[15:0];
DEST[15:0] = (DEST[31:0] > FFFFH) ? FFFFH : TMP[15:0] ;
TMP[31:16] = (DEST[63:32] < 0) ? 0 : DEST[47:32];
DEST[31:16] = (DEST[63:32] > FFFFH) ? FFFFH : TMP[31:16] ;
TMP[47:32] = (DEST[95:64] < 0) ? 0 : DEST[79:64];
DEST[47:32] = (DEST[95:64] > FFFFH) ? FFFFH : TMP[47:32] ;
TMP[63:48] = (DEST[127:96] < 0) ? 0 : DEST[111:96];
DEST[63:48] = (DEST[127:96] > FFFFH) ? FFFFH : TMP[63:48] ;
TMP[63:48] = (DEST[127:96] < 0) ? 0 : DEST[111:96];
DEST[63:48] = (DEST[127:96] > FFFFH) ? FFFFH : TMP[63:48] ;
TMP[79:64] = (SRC[31:0] < 0) ? 0 : SRC[15:0];
DEST[63:48] = (SRC[31:0] > FFFFH) ? FFFFH : TMP[79:64] ;
TMP[95:80] = (SRC[63:32] < 0) ? 0 : SRC[47:32];
DEST[95:80] = (SRC[63:32] > FFFFH) ? FFFFH : TMP[95:80] ;
TMP[111:96] = (SRC[95:64] < 0) ? 0 : SRC[79:64];
DEST[111:96] = (SRC[95:64] > FFFFH) ? FFFFH : TMP[111:96] ;
TMP[127:112] = (SRC[127:96] < 0) ? 0 : SRC[111:96];
DEST[128:112] = (SRC[127:96] > FFFFH) ? FFFFH : TMP[127:112] ;

Flags Affected

None

Exceptions

64-Bit Mode Exceptions

Exception Description
#UD If EM in CR0 is set. If OSFXSR in CR4 is 0. If CPUID feature flag ECX.SSE4_1 is 0. If LOCK prefix is used. Either the prefix REP (F3h) or REPN (F2H) is used.
#NM If TS in CR0 is set.
#PF(fault-code) For a page fault.
#SS(0) If a memory address referencing the SS segment is in a non- canonical form.
#GP(0) If the memory address is in a non-canonical form. If a memory operand is not aligned on a 16-byte boundary, regardless of segment.

Compatibility Mode Exceptions

Same exceptions as in Protected Mode.

Virtual-8086 Mode Exceptions

Exception Description
#PF(fault-code) For a page fault.
Same exceptions as in Real Address Mode.

Real-Address Mode Exceptions

Exception Description
#UD If CR0.EM[bit 2] = 1. If CR4.OSFXSR[bit 9] = 0. If CPUID.SSE4_1(ECX bit 19) = 0. If LOCK prefix is used. Either the prefix REP (F3h) or REPN (F2H) is used.
#NM If CR0.TS[bit 3] = 1.
#GP(0) If any part of the operand lies outside of the effective address space from 0 to 0FFFFH. If a memory operand is not aligned on a 16-byte boundary, regardless of segment.

Protected Mode Exceptions

Exception Description
#UD If CR0.EM[bit 2] = 1. If CR4.OSFXSR[bit 9] = 0. If CPUID.SSE4_1(ECX bit 19) = 0. If LOCK prefix is used. Either the prefix REP (F3h) or REPN (F2H) is used.
#NM If CR0.TS[bit 3] = 1.
#PF(fault-code) For a page fault.
#SS(0) For an illegal address in the SS segment.
#GP(0) For an illegal memory operand effective address in the CS, DS, ES, FS, or GS segments. If a memory operand is not aligned on a 16-byte boundary, regardless of segment.