PCMPESTRM

Packed Compare Explicit Length Strings, Return Mask

Opcodes

Hex Mnemonic Encoding Long Mode Legacy Mode Description
66 0F 3A 60 /r imm8 PCMPESTRM xmm1, xmm2/m128, imm8 A Valid Valid Perform a packed comparison of string data with explicit lengths, generating a mask, and storing the result in XMM0

Instruction Operand Encoding

Op/En Operand 0 Operand 1 Operand 2 Operand 3
A NA imm8 ModRM:r/m (r) ModRM:reg (r)

Description

The instruction compares data from two string fragments based on the encoded value in the imm8 contol byte (see Section 4.1, "Imm8 Control Byte Operation for PCMPESTRI / PCMPESTRM / PCMPISTRI / PCMPISTRM"), and generates a maskstored to XMM0.

Each string fragment is represented by two values. The first value is an xmm (or possibly m128 for the second operand) which contains the data elements of the string (byte or word data). The second value is stored in EAX (for xmm1) or EDX (for xmm2/m128) and represents the number of bytes/words which are valid for the respective xmm/m128 data.

The length of each input is interpreted as being the absolute-value of the value in EAX (EDX). The absolute-value computation saturates to 16 (for bytes) and 8 (for words), based on the value of imm8[bit0] when the value in EAX (EDX) is greater than 16 (8) or less than -16 (-8).

The comparison and aggregation operations are performed according to the encoded value of Imm8 bit fields (see Section 4.1). As defined by imm8[6], IntRes2 is theneither stored to the least significant bits of XMM0 (zero extended to 128 bits) or expanded into a byte/word-mask and then stored to XMM0.

Note that the Arithmetic Flags are written in a non-standard manner in order to supply the most relevant information:

Effective Operand Size
Operating mode/size Operand1 Operand 2 Length1 Length2 Result
16 bit xmm xmm/m128 EAX EDX XMM0
32 bit xmm xmm/m128 EAX EDX XMM0
64 bit xmm xmm/m128 EAX EDX XMM0
64 bit + REX.W xmm xmm/m128 RAX RDX XMM0

Exceptions

SIMD Floating-Point Exceptions

N/A.

64-Bit Mode Exceptions

Exception Description
#UD If EM in CR0 is set. If OSFXSR in CR4 is 0. If CPUID.01H:ECX.SSE4_2 [Bit 20] = 0. If LOCK prefix is used. Either the prefix REP (F3h) or REPN (F2H) is used.
#NM If TS in CR0 is set.
#PF (fault-code) For a page fault.
#SS(0) If a memory address referencing the SS segment is in a non- canonical form.
#GP(0) If the memory address is in a non-canonical form.

Compatibility Mode Exceptions

Same exceptions as in Protected Mode.

Virtual-8086 Mode Exceptions

Exception Description
#PF(fault-code) For a page fault
Same exceptions as in Real Address Mode.

Real-Address Mode Exceptions

Exception Description
#UD If EM in CR0 is set. If OSFXSR in CR4 is 0. If CPUID.01H:ECX.SSE4_2 [Bit 20] is 0. If LOCK prefix is used. Either the prefix REP (F3h) or REPN (F2H) is used.
#NM If TS in CR0 is set.
#GP If any part of the operand lies outside the effective address space from 0 to FFFFH.

Protected Mode Exceptions

Exception Description
#SS(0) For an illegal address in the SS segment #UD If EM in CR0 is set. If OSFXSR in CR4 is 0. If CPUID.01H:ECX.SSE4_2 [Bit 20] is 0. If LOCK prefix is used. Either the prefix REP (F3h) or REPN (F2H) is used.
#NM If TS in CR0 is set.
#PF(fault-code) For a page fault.
#GP(0) For an illegal memory operand effective address in the CS, DS, ES, FS or GS segments.