PSUBUSB/PSUBUSW

Subtract Packed Unsigned Integers with Unsigned Saturation

Opcodes

Hex Mnemonic Encoding Long Mode Legacy Mode Description
66 0F D9 /r PSUBUSW xmm1, xmm2/m128 A Valid Valid Subtract packed unsigned word integers in xmm2/m128 from packed unsigned word integers in xmm1 and saturate result.
0F D9 /r PSUBUSW mm, mm/m64 A Valid Valid Subtract unsigned packed words in mm/m64 from unsigned packed words in mm and saturate result.
66 0F D8 /r PSUBUSB xmm1, xmm2/m128 A Valid Valid Subtract packed unsigned byte integers in xmm2/m128 from packed unsigned byte integers in xmm1 and saturate result.
0F D8 /r PSUBUSB mm, mm/m64 A Valid Valid Subtract unsigned packed bytes in mm/m64 from unsigned packed bytes in mm and saturate result.

Instruction Operand Encoding

Op/En Operand 0 Operand 1 Operand 2 Operand 3
A NA NA ModRM:r/m (r) ModRM:reg (r, w)

Description

Performs a SIMD subtract of the packed unsigned integers of the source operand (second operand) from the packed unsigned integers of the destination operand (first operand), and stores the packed unsigned integer results in the destination operand. See Figure 9-4 in the IntelĀ®64 and IA-32 Architectures Software Developer'sManual, Volume 1, for an illustration of a SIMD operation. Overflow is handled with unsigned saturation, as described in the following paragraphs.

These instructions can operate on either 64-bit or 128-bit operands. When operating on 64-bit operands, the destination operand must be an MMX technology register and the source operand can be either an MMX technology register or a 64-bit memory location. When operating on 128-bit operands, the destination operand must be an XMM register and the source operand can be either an XMM register or a 128-bit memory location.

The PSUBUSB instruction subtracts packed unsigned byte integers. When an individual byte result is less than zero, the saturated value of 00H is written to the destination operand.

The PSUBUSW instruction subtracts packed unsigned word integers. When an individual word result is less than zero, the saturated value of 0000H is written to the destination operand.

In 64-bit mode, using a REX prefix in the form of REX.R permits this instruction to access additional registers (XMM8-XMM15).

Pseudo Code

(* PSUBUSB instruction with 64-bit operands: *)
DEST[7:0] = SaturateToUnsignedByte (DEST[7:0] - SRC (7:0]);
(* Repeat add operation for 2nd through 7th bytes *)
DEST[63:56] = SaturateToUnsignedByte (DEST[63:56] - SRC[63:56];
(* PSUBUSB instruction with 128-bit operands: *)
DEST[7:0] = SaturateToUnsignedByte (DEST[7:0] - SRC[7:0]);
(* Repeat add operation for 2nd through 14th bytes *)
DEST[127:120] = SaturateToUnSignedByte (DEST[127:120] - SRC[127:120]);
(* PSUBUSW instruction with 64-bit operands: *)
DEST[15:0] = SaturateToUnsignedWord (DEST[15:0] - SRC[15:0]);
(* Repeat add operation for 2nd and 3rd words *)
DEST[63:48] = SaturateToUnsignedWord (DEST[63:48] - SRC[63:48]);
(* PSUBUSW instruction with 128-bit operands: *)
DEST[15:0] = SaturateToUnsignedWord (DEST[15:0] - SRC[15:0]);
(* Repeat add operation for 2nd through 7th words *)
DEST[127:112] = SaturateToUnSignedWord (DEST[127:112] - SRC[127:112]);

Flags Affected

None. Numeric Exceptions None.

Exceptions

Numeric Exceptions

None.

64-Bit Mode Exceptions

Exception Description
#AC(0) (64-bit operations only) If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3.
#PF(fault-code) If a page fault occurs.
#MF (64-bit operations only) If there is a pending x87 FPU exception.
#NM If CR0.TS[bit 3] = 1.
#UD If CR0.EM[bit 2] = 1. (128-bit operations only) If CR4.OSFXSR[bit 9] = 0. (128-bit operations only) If CPUID.01H:EDX.SSE2[bit 26] = 0. If the LOCK prefix is used.
#GP(0) If the memory address is in a non-canonical form. (128-bit operations only) If memory operand is not aligned on a 16-byte boundary, regardless of segment.
#SS(0) If a memory address referencing the SS segment is in a non- canonical form.

Compatibility Mode Exceptions

Same exceptions as in protected mode.

Virtual-8086 Mode Exceptions

Exception Description
#AC(0) (64-bit operations only) If alignment checking is enabled and an unaligned memory reference is made.
#PF(fault-code) For a page fault.
Same exceptions as in real address mode.

Real-Address Mode Exceptions

Exception Description
#MF (64-bit operations only) If there is a pending x87 FPU exception.
#NM If CR0.TS[bit 3] = 1.
#UD If CR0.EM[bit 2] = 1. (128-bit operations only) If CR4.OSFXSR[bit 9] = 0. Execution of 128-bit instructions on a non-SSE2 capable processor (one that is MMX technology capable) will result in the instruction operating on the mm registers, not #UD. If the LOCK prefix is used.
#GP (128-bit operations only) If a memory operand is not aligned on a 16-byte boundary, regardless of segment. If any part of the operand lies outside of the effective address space from 0 to FFFFH.

Protected Mode Exceptions

Exception Description
#AC(0) (64-bit operations only) If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3.
#PF(fault-code) If a page fault occurs.
#MF (64-bit operations only) If there is a pending x87 FPU exception.
#NM If CR0.TS[bit 3] = 1.
#UD If CR0.EM[bit 2] = 1. (128-bit operations only) If CR4.OSFXSR[bit 9] = 0. Execution of 128-bit instructions on a non-SSE2 capable processor (one that is MMX technology capable) will result in the instruction operating on the mm registers, not #UD. If the LOCK prefix is used.
#SS(0) If a memory operand effective address is outside the SS segment limit.
#GP(0) If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit. (128-bit operations only) If a memory operand is not aligned on a 16-byte boundary, regardless of segment.