PTEST

Logical Compare

Opcodes

Hex Mnemonic Encoding Long Mode Legacy Mode Description
66 0F 38 17 /r PTEST xmm1, xmm2/m128 A Valid Valid Set ZF if xmm2/m128 AND xmm1 result is all 0s. Set CF if xmm2/m128 AND NOT xmm1 result is all 0s.

Instruction Operand Encoding

Op/En Operand 0 Operand 1 Operand 2 Operand 3
A NA NA ModRM:r/m (r) ModRM:reg (r)

Description

Performs a bitwise AND of the destination operand (first operand) and the source operand (second operand), then sets the ZF flag only if all bits in the result are 0. PTEST sets the CF flag if all bits in the result are 0 of the bitwise AND of the source operand (second operand) and the bitwise logical NOT of the destination operand.

Pseudo Code

IF (SRC[127:0] bitwiseAND DEST[127:0] = 0)
	ZF = 1;
ELSE
	ZF = 0;
FI;
IF (SRC[127:0] bitwiseAND (bitwiseNOT DEST[127:0]) = 0)
	CF = 1;
ELSE
	CF = 0;
FI;
DEST[127:0] Unmodified;
AF = OF = PF = SF = 0;

Flags Affected

The 0F, AF, PF, SF flags are cleared and the ZF, CF flags are set according to the operation

Exceptions

64-Bit Mode Exceptions

Exception Description
#UD If EM in CR0 is set. If OSFXSR in CR4 is 0. If CPUID feature flag ECX.SSE4_1 is 0. If LOCK prefix is used. Either the prefix REP (F3h) or REPN (F2H) is used.
#NM If TS in CR0 is set.
#PF(fault-code) For a page fault.
#SS(0) If a memory address referencing the SS segment is in a non-canonical form.
#GP(0) If the memory address is in a non-canonical form. If a memory operand is not aligned on a 16-byte boundary, regardless of segment.

Compatibility Mode Exceptions

Same exceptions as in Protected Mode.

Virtual-8086 Mode Exceptions

Exception Description
#PF(fault-code) For a page fault.
Same exceptions as in Real Address Mode.

Real-Address Mode Exceptions

Exception Description
#UD If CR0.EM[bit 2] = 1. If CR4.OSFXSR[bit 9] = 0. If CPUID.01H:ECX.SSE4_1[bit 19] = 0. If LOCK prefix is used. Either the prefix REP (F3h) or REPN (F2H) is used.
#NM If CR0.TS[bit 3] = 1.
#GP(0) if any part of the operand lies outside of the effective address space from 0 to 0FFFFH. If a memory operand is not aligned on a 16-byte boundary, regardless of segment.

Protected Mode Exceptions

Exception Description
#UD If CR0.EM[bit 2] = 1. If CR4.OSFXSR[bit 9] = 0. If CPUID.01H:ECX.SSE4_1[bit 19] = 0. If LOCK prefix is used. Either the prefix REP (F3h) or REPN (F2H) is used.
#NM If CR0.TS[bit 3] = 1.
#PF(fault-code) For a page fault.
#SS(0) For an illegal address in the SS segment.
#GP(0) For an illegal memory operand effective address in the CS, DS, ES, FS, or GS segments. If a memory operand is not aligned on a 16-byte boundary, regardless of segment.