RDMSR

Read from Model Specific Register

Opcodes

Hex Mnemonic Encoding Long Mode Legacy Mode Description
0F 32 RDMSR A Valid Valid Read MSR specified by ECX into EDX:EAX.

Instruction Operand Encoding

Op/En Operand 0 Operand 1 Operand 2 Operand 3
A NA NA NA NA

Description

Reads the contents of a 64-bit model specific register (MSR) specified in the ECX register into registers EDX:EAX. (On processors that support the Intel 64 architecture, the high-order 32 bits of RCX are ignored.) The EDX register is loaded with the high-order 32 bits of the MSR and the EAX register is loaded with the low-order 32 bits. (On processors that support the Intel 64 architecture, the high-order 32 bits of each of RAX and RDX are cleared.) If fewer than 64 bits are implemented in the MSR being read, the values returned to EDX:EAX in unimplemented bit locations are undefined.

This instruction must be executed at privilege level 0 or in real-address mode; otherwise, a general protection exception #GP(0) will be generated. Specifying a reserved or unimplemented MSR address in ECX will also cause a general protection exception.

The MSRs control functions for testability, execution tracing, performance-monitoring, and machine check errors. Appendix B, "Model-Specific Registers (MSRs)," inthe IntelĀ®64 and IA-32 Architectures Software Developer's Manual, Volume 3B, lists all the MSRs that can be read with this instruction and their addresses. Note that each processor family has its own set of MSRs.

The CPUID instruction should be used to determine whether MSRs are supported (CPUID.01H:EDX[5] = 1) before using this instruction.

Pseudo Code

EDX:EAX = MSR[ECX];

Flags Affected

None.

Exceptions

64-Bit Mode Exceptions

Exception Description
#UD If the LOCK prefix is used.
#GP(0) If the current privilege level is not 0. If the value in ECX or RCX specifies a reserved or unimplemented MSR address.

Compatibility Mode Exceptions

Same exceptions as in protected mode.

Virtual-8086 Mode Exceptions

Exception Description
#GP(0) The RDMSR instruction is not recognized in virtual-8086 mode.

Real-Address Mode Exceptions

Exception Description
#UD If the LOCK prefix is used.
#GP If the value in ECX specifies a reserved or unimplemented MSR address.

Protected Mode Exceptions

Exception Description
#UD If the LOCK prefix is used.
#GP(0) If the current privilege level is not 0. If the value in ECX specifies a reserved or unimplemented MSR address.