STMXCSR

Store MXCSR Register State

Opcodes

Hex Mnemonic Encoding Long Mode Legacy Mode Description
0F AE /3 STMXCSR m32 A Valid Valid Store contents of MXCSR register to m32.

Instruction Operand Encoding

Op/En Operand 0 Operand 1 Operand 2 Operand 3
A NA NA NA ModRM:r/m (w)

Description

Stores the contents of the MXCSR control and status register to the destination operand. The destination operand is a 32-bit memory location. The reserved bits in the MXCSR register are stored as 0s.

This instruction's operation is the same in non-64-bit modes and 64-bit mode.

Pseudo Code

m32 = MXCSR;

Exceptions

Numeric Exceptions

None.

Exceptions

None.

64-Bit Mode Exceptions

Exception Description
#AC For unaligned memory reference. To enable #AC exceptions, three conditions must be true: CR0.AM[bit 18] = 1, EFLAGS.AC[bit 18] = 1, current CPL = 3 #UD If CR0.EM[bit 2] = 1. If CR4.OSFXSR[bit 9] = 0. If CPUID.01H:EDX.SSE[bit 25] = 0. If the LOCK prefix is used.
#NM If CR0.TS[bit 3] = 1.
#PF(fault-code) For a page fault.
#GP(0) If the memory address is in a non-canonical form.
#SS(0) If a memory address referencing the SS segment is in a non-canonical form.

Compatibility Mode Exceptions

Same exceptions as in protected mode.

Virtual-8086 Mode Exceptions

Exception Description
#AC For unaligned memory reference.
#PF(fault-code) For a page fault.
Same exceptions as in real address mode.

Real-Address Mode Exceptions

Exception Description
#UD If CR4.OSFXSR[bit 9] = 0. If CPUID.01H:EDX.SSE[bit 25] = 0. If the LOCK prefix is used.
#NM If CR0.TS[bit 3] = 1.
#UD If CR0.EM[bit 2] = 1.
#GP(0) If any part of the operand would lie outside of the effective address space from 0 to 0FFFFH.

Protected Mode Exceptions

Exception Description
#UD If CR4.OSFXSR[bit 9] = 0. If CPUID.01H:EDX.SSE[bit 25] = 0. If the LOCK prefix is used.
#AC For unaligned memory reference. To enable #AC exceptions, three conditions must be true: CR0.AM[bit 18] = 1, EFLAGS.AC[bit 18] = 1, current CPL = 3.
#NM If CR0.TS[bit 3] = 1.
#UD If CR0.EM[bit 2] = 1.
#PF(fault-code) For a page fault.
#SS(0) For an illegal address in the SS segment.
#GP(0) For an illegal memory operand effective address in the CS, DS, ES, FS, or GS segments.