VMXON

Enter VMX Operation

Opcodes

Hex Mnemonic Encoding Long Mode Legacy Mode Description
F3 0F C7 /6 VMXON None None None Enter VMX root operation.

Description

Puts the logical processor in VMX operation with no current VMCS, blocks INIT signals, disables A20M, and clears any address-range monitoring established by the MONITOR instruction.1

The operand of this instruction is a 4KB-aligned physical address (the VMXON pointer) that references the VMXON region, which the logical processor may use to support VMX operation. This operand is always 64 bits and is always in memory.

Pseudo Code

IF (register operand) or (CR0.PE = 0) or (RFLAGS.VM = 1) or (IA32_EFER.LMA = 1 and CS.L = 0)
	#UD;
ELSE
	IF not in VMX operation
		IF (CPL > 0) or (in A20M mode) or (the values of CR0 and CR4 are not supported in VMX operation) or (bit 0 (lock bit) of IA32_FEATURE_CONTROL MSR is clear) or (in SMX operation and bit 1 of IA32_FEATURE_CONTROL MSR is clear) or (outside SMX operation and bit 2 of IA32_FEATURE_CONTROL MSR is clear)
			#GP(0);
		ELSE
			addr = contents of 64-bit in-memory source operand;
			IF addr is not 4KB-aligned or (processor supports Intel 64 architecture and addr sets any bits beyond the VMX physical-address width) or (processor does not support Intel 64 architecture and addr sets any bits in the range 63:32)
				VMfailInvalid;
			ELSE
				rev = 32 bits located at physical address addr;
				IF rev != VMCS revision identifier supported by processor VMfailInvalid;
				ELSE
					current-VMCS pointer = FFFFFFFF_FFFFFFFFH;
					enter VMX operation;
					block INIT signals;
					block and disable A20M;
					clear address-range monitoring;
					VMsucceed;
				FI;
			FI;
		FI;
	ELSE
		IF in VMX non-root operation
			VMexit;
		ELSE
			IF CPL > 0
				#GP(0);
			ELSE
				VMfail("VMXON executed in VMX root operation");
			FI;
		FI;
	FI;
FI;

Flags Affected

See the operation section and Section 5.2.

Exceptions

64-Bit Mode Exceptions

Exception Description
#UD If operand is a register. If executed with CR4.VMXE = 0.
#SS(0) If the source operand is in the SS segment and the memory address is in a non-canonical form.
#PF(fault-code) If a page fault occurs in accessing the memory source operand.
#GP(0) If executed outside VMX operation with CPL > 0 or with invalid CR0 or CR4 fixed bits. If executed in A20M mode. If the source operand is in the CS, DS, ES, FS, or GS segments and the memory address is in a non-canonical form.

Compatibility Mode Exceptions

Exception Description
#UD The VMXON instruction is not recognized in compatibility mode.

Virtual-8086 Mode Exceptions

Exception Description
#UD The VMXON instruction is not recognized in virtual-8086 mode.

Real-Address Mode Exceptions

Exception Description
#UD The VMXON instruction is not recognized in real-address mode.

Protected Mode Exceptions

Exception Description
#UD If operand is a register. If executed with CR4.VMXE = 0.
#SS(0) If the memory source operand effective address is outside the SS segment limit. If the SS register contains an unusable segment.
#PF(fault-code) If a page fault occurs in accessing the memory source operand.
#GP(0) If executed outside VMX operation with CPL>0 or with invalid CR0 or CR4 fixed bits. If executed in A20M mode. If the memory source operand effective address is outside the CS, DS, ES, FS, or GS segment limit. If the DS, ES, FS, or GS register contains an unusable segment. If the source operand is located in an execute-only code segment.